1. Field of the Invention
The present invention relates to a tape carrier which is a type of semiconductor package.
2. Description of the Related Art
Heretofore, tape carriers have been used as packages for custom integrated circuits for use in electronic devices such as liquid crystal drivers, electronic watches, hand-held calculators, etc. The tape carriers can be manufactured at fine pitch. For this reason the tape carriers have recently found application in packages for semicustom integrated circuits such as gate arrays.
FIGS. 4 and 5 illustrate prior tape carriers for gate arrays. There is provided a mounting portion 3 in the center of a tape carrier body 1 through tie bars 2. A semiconductor device 4 formed of a gate array is mounted on the center of the mounting portion 3. There are provided pads 5 for inputting and outputting signals and pads 5a for power supply on the periphery of the device 4.
On the tape carrier body 1 there are disposed a number of test pads 7 around slits 6 each formed between the tie bars 2. These test pads 7 are connected to corresponding pads 5 of the device 4 by outer leads 8 extending across the slits 6.
With the tape carrier, various tests including burn-in test are made by the use of the test pads 7 and a socket (not shown) with needles which are brought into contact with corresponding pads 7. If, therefore, the positions of the test pads 7 are determined beforehand, tests for various types of products will be made by the use of a single type of socket. This eliminates the necessity that various types of sockets be developed. For this reason tape carriers of this configuration are suitable for gate arrays whose development time is required to be as short as possible.
FIG. 6 illustrates a tape carrier having more outer leads 8 than the tape carrier shown in FIGS. 4 and 5. This tape carrier is provided with test pads 7 in the same positions as in the tape carrier shown in FIG. 4 and thus permitted to use the same socket as the tape carrier of FIG. 4.
It is usual that the connection of the outer leads 8 to the test pads 7 is made sequentially from the central test pad to its outer test pads and test pads at the ends are left unused. This is to prevent manufacture of the tapes from becoming difficult. According to this approach, the pitch of wires 8a connecting the outer leads 8 to the test pads 7 can be maximized, which makes the manufacture of tapes easy.
With the above-mentioned conventional method of connecting outer leads to test pads, however, some problems may arise in making the burn-in test or other tests although a test socket can be shared among various types of tape carriers. That is, it is difficult to share a burn-in board or a test board among various types of devices because the position of test pads for power supply is device-dependent. Moreover, it is impossible to thicken wires 8a because the spacing between adjacent outer leads is narrow. If the wires are thin, their inductance will increase and thus power noise will be generated. In particular, this is a serious problem in high-speed gate arrays.